Moore's Law, formulated by Gordon Moore in 1965, observes that the number of transistors on a chip doubles approximately every two years, leading to increased performance and reduced costs. It has driven technological advancements for 60 years, enabling innovations like smartphones and self-driving cars, and remains relevant as it continues to push the boundaries of computing power.
Gordon Moore never intended for his observation to be named after him and considered it an economics paper disguised as an electronics one. He preferred the term 'Carver Mead's Law,' named after a colleague at Caltech.
The three key pillars of Moore's Law are: increasing the number of transistors on a chip, making them faster, and reducing their power consumption. These pillars have driven the evolution of semiconductor technology for decades.
Moore's Law has enabled self-driving cars by increasing the number of transistors, reducing power consumption, and improving processing speeds by orders of magnitude. This has allowed the technology to shrink from a massive, slow-moving research project to practical, efficient vehicles.
Breakthroughs such as advanced packaging, new materials (like high-K metal gate and strained silicon), and architectural innovations (like FinFET and gate-all-around transistors) are keeping Moore's Law alive. These advancements allow for more transistors, faster speeds, and lower power consumption.
Intel is a key steward of Moore's Law, with a unique integrated research-to-manufacturing pipeline. This allows them to innovate across materials, architecture, and packaging, ensuring that advancements reach consumers efficiently within a decade.
Advanced packaging, such as 3D chiplet integration, allows for more transistors in a package by combining multiple chips efficiently. This approach helps maintain Moore's Law by delivering increased functionality, lower power consumption, and higher speeds without relying solely on transistors on a single chip.
Selective Layer Transfer (SLT) is a breakthrough in packaging technology that combines the benefits of wafer-to-wafer and chip-to-wafer bonding. It allows for precise integration of chips, enabling more efficient and flexible chip assembly, which is critical for high-performance applications like AI.
Intel's approach to advanced packaging is unique due to its holistic research-to-manufacturing pipeline, allowing seamless transfer of ideas from research to development and production. This integration ensures that innovations are quickly and efficiently brought to market.
RibbonFET is a gate-all-around transistor design that optimizes the channel for better control of current flow. It represents the ultimate evolution of transistor design, enabling smaller, faster, and lower-power transistors, which are essential for maintaining Moore's Law.
Ruthenium is a material that outperforms copper in smaller interconnects, offering better conductivity. Air gaps reduce capacitive crosstalk between wires, improving signal transmission speed. Together, they represent the next evolution in chip wiring technology.
The future lies in developing ultra-low power switches based on new physics, which would require a complete rethinking of chip design and software. This innovation is crucial to address the growing demand for computation power while reducing energy consumption.
Regional diversification ensures a geopolitically secure supply chain by spreading manufacturing across multiple regions. This reduces reliance on any single geographic area, enhancing global resilience and addressing geopolitical risks.
In this episode, we dive into the future of computing with Sanjay Natarajan), SVP and GM of Intel Foundry) Technology Research. From keeping Moore’s Law alive to breakthroughs in advanced packaging, AI, and materials, discover how Intel is shaping the next era of innovation in semiconductors and global technology leadership.Also, check out our latest merch at Interesting Engineering Shop).